stress intensity factor

SIF for 3D crack in ANSYS

Dear all

I am searching for procedure to calculate stress intensity factor of bonded repair of cracked plate, so any one has any idea how to calculate stress intensity factor in 3D crack model By ANSYS, please guide me. I need your help.

Looking for your help.

Please share your valuable documents at:-

himanshu@iitp.ac.in

hpiitp@gmail.com


Julien Jonvaux's picture

Stress intensity factors for a slanted crack under compression

Hello everyone,

Here is the problem I have: I'm modeling the geometry of a simple straight edge crack in a 2D elastic medium using Abaqus. I assume plain stress conditions. The crack makes an angle with the horizontal, is small enough to be considered as embedded in an infinite domain (ratio crack length/size of domain < 1/10) and I apply a vertical compressive load on top of my domain. I fixed one point in displacement at the bottom of it and the whole bottom edge is constrained not to move vertically.


Sandip Haldar's picture

Why does the overshoot occur in Dynamic Stress Intensity Factor

I wanted to get some insight in the transient stress intensity factor (SIF).

In the time history, we notice there is an overshoot (~27%)  from the
steady state SIF for a fixed (not propagating crack). I found the
overshoot occurs at the time when the reflected wave from the opposite
crack-tip comes back to the first crack tip. I wanted to know why this
overshoot occurs, what is the physical explanation?

Sandip Haldar 


Juil Yoon's picture

Spacing effect on dislocation injection from sharp features in strained silicon structures

In practice, the SiN stripes or pads are periodically patterned on silicon, so the spacing effect on dislocation injection from sharp features deserves attention. As in Figure 1, the SiN stripes with residue stress , of width L and thickness h, are periodically patterned with spacing S. In the numerical calculation, we take shear modulus and Poisson’s ratio of Si3N4 to be 54.3 GPa and 0.27, and those of silicon 68.1GPa and 0.22, the same as in Ref.[1].


Zhen Zhang's picture

A method to analyze dislocation injection from sharp features in strained silicon structures

Stresses inevitably arise in a microelectronic device due to mismatch in coefficients of thermal expansion, mismatch in lattice constants, and growth of materials. Moreover, in the technology of strained silicon devices, stresses have been deliberately introduced to increase carrier mobility. A device usually contains sharp features like edges and corners, which may intensify stresses, inject dislocations into silicon, and fail the device. On the basis of singular stress fields near the sharp features, this letter describes a method to obtain conditions that avert dislocations.


Syndicate content