Packaging mechanical engineers conduct simulation of electronic packages
to optimize package design for compatibility with assembly processes
and for reliable operation in end user systems such as servers, game
consoles and network switches. Simulation is conducted using commercial
finite element software such as ANSYS or ABAQUS to predict package
component stresses and strains. Simulations are verified by measurements
of warpage and stresses / strains in the packages using Digital image
contrast, strain gages, capacitance meters, etc. Package material
properties such as coefficient of thermal expansion, Poisson ratio and
modulus that are required for simulation are measured using specialized
mechanical equipment. Thus, familiarity with numerical simulation

The exponential growth in integrated device density has yielded high-performance microprocessors containing almost 1 billion transistors per chip for the current 65 nm technology. Continuous scaling of the devices and performance requires innovations in materials, processes, and designs for both back-end-of-line (BEoL) interconnects and packaging structures. Mechanical reliability has been a limiting factor for implementation of new materials and processes.

X. Zhang, S. H. Im, R. Huang, P. S. Ho, Chapter 2 in Integrated Interconnect Technologies for 3D Nanoelectronic Systems (Editors: M. Bakir and J. Meindl), Artech House, Norwood, MA, 2008. 

Abstract: 

ITherm (http://www.ithermconference.org/) and ECTC (http://www.ectc.net/) are two important conferences in electronic packaging and systems. They are normally located at the same hotel and the same time. The attendees can register for both confercences by paying $100 extra. The total attendance of the two conferences is about 1500. The page counts of the proceedings of the two conferences together is more than 1600 every year. ITherm is more modeling and simulation focused. It is a very good opportunity for mechanicians to meet enigeers in semiconductor industry.

ITherm 2008

The 8th International Conference on Electronics Packaging Technology (ICEPT), organized and supported by authoritative academic organizations and leading industries, will be held at Shanghai, China from August 14 -17, 2007.

Flip-chip plastic ball grid array (FC-PBGA) packages are widely used in high performance components. However, its die back is normally under tensile stress at low temperatures. This paper presents a probabilistic mechanics approach to predict the die failure rate in the FC-PBGA qualification process. The methodology consists of three parts:

1. die strength test using four-point bending (4PB) method;
2. the radius of curvature (ROC) measurement of the assembled FC-PBGA at room temperature;
3. Finite element method (FEM) stress analysis.